# Recent questions and answers in Digital Electronics

Can we create a digital circuit that has as inputs the  3- bit digital words [2: 0] A, [2: 0] B and [2: 0] C and its output is  equal to      |C-A-B| . The circuit of the binary full adder is known.

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying A) J = 0, K = 0 and using a clock B) J = 1, K = 0 and using the clock C) Asynchronous preset input D) J = 1, K = 1 and using the clock

Which one of the following logic circuit has the highest speed as compared to the currently available logic circuits? A) Resistance-transistor logic B) Emitter-coupled logic C) Integrated-injection logic D) Diode-transistor logic

What is the 2's complement of 01101? A) 10010 B) 10011 C) 1100 D) 1001

The current mode logic (CML) is same as A) LSI B) CMOS C) TTL D) ECL

Which code is used in constructing k-maps?  A) Hamming code B) 2 out of 5 code C) BCD code D) Gray code

For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs

Decimal equivalent of Hexadecimal number (C3B1)16 is: A) 12197 B) 32097 C) 52097 D) 50097

The IC used for 2:1 multiplexer is (A) IC 74150 (B) IC 74151 (C) IC 74153 (D) IC 74157

A bi-stable multi-vibrator can be built by using (A) NAND gates (B) AND gates (C) AND or OR gates (D) Excusive-NOR gates

A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: (1) De Morgan’s Law (2) Involution Law (3) Law of Absorption (4) Idempotent Law

Initially the number decimal 8 is stored. If instruction RAL is executed twice, the final number stored will be: (1) Decimals 8 (2) Decimal 16 (3) Decimal 32 (4) Decimal 2

Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input clock frequency of 20.48 MHz: (1) 10.24 kHz (2) 5 kHz (3) 30.24 kHz (4) 15 kHz

The output of an exclusive–NOR gate is 1. Which input combination is correct? (1) A = 1, B = 0 (2) A = 0, B = 1 (3) A = 0, B = 0 (4) None of these

In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be (a) 0 (b) 1 (c) showing no change (d) toggle

How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ? (a) 1 (b) 6 (c) 10 (d) 23

How many minimum number of NOR gates are required to realize a two-input X-OR gate?

Output of NAND gate is 0. for three inputs when:

In a PLL, lock occurs when the (A) input frequency and the VCO frequency are the same (B) Phase error is 1800 (C) VCO frequency is double the input frequency (D) Phase error is 900

The following logic families have their propagation delay. Arrange them from lowest propagation delay to highest propagation delay. 1. TTL (Standard) 2. ECL 3. Low power CMOS 4. DTL (A) 2, 1, 4 and 3 (B) 2, 4, 1 and 3 (C) 4, 2, 3 and 1 (D) 1, 2, 3 and 4

In successive approximation converter input to the comparator is through (A) DAC (B) Latch (C) Flip-flop (D) Sample and hold circuit

Read the following statements: i. Gate is a combinational logic. ii. JK Flip-flop in toggle mode is not combinational logic. iii. MSJK Flip-flop suffers from race-around. iv. Counters are sequential circuits. Which choice is correct? (A) i, ii (B) i, ii, iv (C) ii, iii, iv (D) i, ii, iii

Which of the following peripherals provide I/O facilities? i. 8279 ii. 8155 iii. 8259 iv. 8255 (A) i, ii (B) ii, iii (C) iii, iv (D) ii, iv

In standard TTL gates, the totem pole output stage is primarily used to (A) increase the noise margin of the gate (B) decrease the output switching delay (C) facilitate a wired OR logic connection (D) increase the output impedance of the circuit

Which of the following is error correcting code? (A) EBCDIC (B) GRAY (C) Hamming (D) ASCII

The number of switching functions of 3 variables is (A) 8 (B) 64 (C) 128 (D) 256

The decimal equivalent of the hexadecimal number E5 is  (a) 279 (b) 229 (c) 427 (d) 3000

No. of flip-flops used in decade counter (a) 3 (b) 2 (c) 4 (d) None of these

How is a J-K Flip Flop made to toggle  (a) J=0, K=0 (b) J=1, K=0 (c) J=0, K=1 (d) J=1, K=1

A half adder can be constructed from

The decimal equivalent of a Hexadecimal no. (F8E6)16 is

Hexadecimal equivalent of the decimal number 25610 is

The frequency of the clock signal applied to the rising edge triggered D flip-flop shown in figure is 10 KHZ. The frequency of the signal at Q is A) 10 KHz B) 2.5 KHz C) 20 KHz D) 5 KHz

For the circuit shown in figure, the Boolean expression for the output y in terms of inputs P, Q, R and S is

If the contents of an accumulator are Ex-ORed with itself and placed in the accumulator itself, then  A) Carry flag will be set B) The accumulator contains all 1’s C) The zero flag is set D) The accumulator contents are shifted left by one bit

The number of comparators required in a 3-bit comparator type analog to digital converter is  A) 2 B) 3 C) 7 D) 8

The Octal equivalent of HEX and number AB.CD is  (A) 253.314 (B) 253.632 (C) 526.314 (D) 526.632

The complete set of only those Logic Gates designated as Universal Gates is  (A) NOT, OR and AND Gates (B) XNOR, NOR and NAND Gates (C) NOR and NAND Gates (D) XOR, NOR and NAND Gates

The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is  (A) 4 (B) 6 (C) 8 (D) 10

A bulb in a staircase has two switches, one switch being at the ground floor and the other one at the first floor. The bulb can be turned ON and also can be turned OFF by any one of the switches irrespective of the state of the other switch. The logic of switching of the bulb resembles  (A) and AND gate (B) an OR gate (C) an XOR gate (D) a NAND gate

Boolean algebra is based on  (A) numbers (B) logic (C) truth (D) symbols

When A = 0., B = 0, C = 1 then in two input logic gate we get gate  (A) XOR gate (B) AND gate (C) NAND gate (D) NOR gate

Register and counters are similar in the sense that they both   (A) count pulses (B) store binary operation (C) shift operation (D) made from an array of flip flops and gates integrated on a single chip

Registers in which data is entered or taken out in serial form are referred as   (A) left shift register (B) right shift register (C) shift registers (D) none of the above

IC which has quad 2 input AND gates   (A) 7411 (B) 7404 (C)7400 (D) 7408

In the 8421 BCD code the decimal number 125 is written as   (A) 1111101 (B) 0001 0010 0101 (C) 7D (D) None of the bove

8 in decimal system is equal to ____ in binary system