What do you mean by simulation? Why it is necessary?
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Simulation is functional emulation of a circuit design through software programs that use models to replicate how a device will perform in terms of timing and results. It should be performed at all stages of circuit design.


Need of simulation: 

1. VHDL simulation serves as a basis for testing complex designs and validating the design prior to fabrication. 

2. It allows the observation of the circuits behavior at the inputs and outputs and all internal rules. 

3. The simulation program processes as representation of input stimuli and determines the behavior of signal with respect to time stops. 

4. The simulation is done for the verification of the behavior of the circuit for both time behavior and fundamental behavior. 

5. Simulation operation can be used to verify independent delays in the circuits. 

6. Simulation is used for design verification: Validate assumptions, Verify logic, Verify performance (timing)

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