The Spartan-3E family architecture consists of five fundamental programmable functional elements:
Configurable Logic Blocks (CLBs): Contain flexible Look-Up Tables (LUTs) that implement logic plus storage elements used as flip-flops or latches. CLBs perform a wide variety of logical functions as well as store data.
Input/ Output Blocks (IOBs): Control the flow of data between the I/O pins and the internal logic of the device. Each IOB supports bidirectional data flow plus 3-state operation. Double Data-Rate (DDR) registers are included.
Block RAM : Provides data storage in the form of 18-Kbit dual-port blocks.
Multiplier Blocks : Accept two 18-bit binary numbers as inputs and calculate the product.
Digital Clock Manager (DCM): Blocks provide self-calibrating, fully digital solutions for distributing, delaying, multiplying, dividing, and phase-shifting clock signals.