# A parity check usually can detect

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A parity check usually can detect One-bit error.

## Related questions

Parity bit check is used to

How many characters per sec (7 bits + 1 parity) can be transmitted over a 2400 bps line if the transfer is synchronous (1 start bit and 1 stop bit)?  A) 300 B) 240 C) 250 D) 275

Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is

How can we check a Mosfet?

Can we create a digital circuit that has as inputs the  3- bit digital words [2: 0] A, [2: 0] B and [2: 0] C and its output is  equal to      |C-A-B| . The circuit of the binary full adder is known.

The output of a JK flip-flop with asynchronous preset and clear inputs is ‘1’. The output can be changed to ‘0’ with one of the following conditions by applying A) J = 0, K = 0 and using a clock B) J = 1, K = 0 and using the clock C) Asynchronous preset input D) J = 1, K = 1 and using the clock

A bi-stable multi-vibrator can be built by using (A) NAND gates (B) AND gates (C) AND or OR gates (D) Excusive-NOR gates

A half adder can be constructed from

Differential relays detect internal faults in 3-phase transformers by (A) zero sequence currents (B) positive sequence currents (C) negative sequence currents (D) both positive and negative sequence currents

Which of the following gates can be used to realize all possible combinational logic functions?  (i) OR gate (ii) NOR gate (iii) Exclusive OR gate (iv) NAND gate (v) AND gate  (A) (iii), (iv) and (v)  (B) (i), (iii) and (iv)  (C) (ii) and (iv)  (D) (i) and (v)

Among the logic families, the family which can be used at very high frequency greater than 100 MHz in a 4 bit synchronous counter is

In the flag register, parity flag is at bit location  A) B0 B) B2 C) B4 D) B5

Each time you turn on your computer, it will check on the control file  (1) Command.com, io.sys (2) Command.com, date.com, dir.com (3) Command.com, io.sys, msdos.sys (4) Chkdsk.exe

Each time you turn the power switch on which control files the computer will check  (1) command.com, io.sys (2) command.com, date.com, time.com (3) command.com, io.sys, msdos.sys (4) chkdsk.exe

Fuse wire protection system is usually not used beyond: a. 10A b. 25A c. 50A d. 100A

In the Squirrel cage induction motors, the rotor slots are usually a slight skew to reduce (A) Windage losses (B) Eddy currents (C) Accumulation of dirt and dust (D) Magnetic hum

A buffer amplifier is usually associated with (A) High input resistance (B) Low output resistance (C) Unity Voltage Gain (D) All Of the above

Breaking capacity of a circuit breaker is usually expressed in terms of  (1) Ampere (2) Volts (3) MW (4) MVA

A differentiator is not usually used in control system, because it : - (A) reduces damping  (B) increases error  (C) reduces gain margin  (D) increases input noise

Transient stability studies of a power system are usually carried out over a time period of (A) two or more seconds (B) several time swings (C) time interval of first swing (D) sustained oscillations

A practical current source is usually represented by  a. A resistance in series with an ideal current source.  b. A resistance in parallel with an ideal current source.  c. A resistance in parallel with an ideal voltage source.  d. None of the above.

A generating station which has a high investment cost and low operating cost is usually operated as  A) Peak load station B) Spinning reserve station C) Base load station D) None of the above

For a NAND gate, when one or more inputs are low then the output will be A) Low B) High C) Alternately high and low D) High or low depending on relative magnitude of inputs

A NOR gate is equivalent to a bubbled AND gate. This statement is an outcome of: (1) De Morgan’s Law (2) Involution Law (3) Law of Absorption (4) Idempotent Law

Determine the output frequency for a frequency division circuit that contains 12 flip–flops with an input clock frequency of 20.48 MHz: (1) 10.24 kHz (2) 5 kHz (3) 30.24 kHz (4) 15 kHz

How many flip-flops are required to build a binary counter circuit to count from 0 to 1023 ? (a) 1 (b) 6 (c) 10 (d) 23

In a positive edge triggered JK flip-flop, J = 1, K = 0 and clock pulse is rising, Q will be (a) 0 (b) 1 (c) showing no change (d) toggle

How many minimum number of NOR gates are required to realize a two-input X-OR gate?

In a PLL, lock occurs when the (A) input frequency and the VCO frequency are the same (B) Phase error is 1800 (C) VCO frequency is double the input frequency (D) Phase error is 900